Fetch Decode Execute - Lakelands Computing

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The Fetch Decode and Execute Cycle
All programs are just sets of instructions. The CPU's job is to run these instructions.

It does this by following a process known as ‘fetch, decode and execute’ cycle.  To run a program it is first copied from secondary storage to RAM. Once it is copied the program counter (a register) is told where the first instruction is located. (You might want to look at the pages on registers  and the ALU / CU as well to help make sense of this).

Fetch
  • The processor looks in the Program Counter to see where the instruction is, its address.
  • It then copies this address into the Memory Address Register.
  • It then goes to this address (location) and "fetches" or gets the instruction, which it copies into the Memory Data Register.
  • The processor then increases the program counter to show where the next instruction is stored.

Decode
  • Once the instruction is loaded into the Memory Data Register, the CPU needs to know what the instruction actually means, so the Control Unit decodes it - figuring out what the instruction actually means, and splitting the instruction and data into seperate parts.

Execute
  • The instruction is then carried out. This could be loading data, writing data (saving it), or using the Arithmetic Logic Unit (ALU to do a mathematical calculation or a logic operation.
  • It would use the acccumulator to store what are called "intermediate results" as it did these calculations - think of it as jotting down a number on a bit of paper halfway through a calculation

For more on this cycle please  watch the videos, and look at the Register page
Video going through the various stages of the Cycle. It shows the registers and Memory changing. Keep an eye on the very helpful text (top left).
All Text copyright Lakelands Academy & Mr T Purslow 2020.
All images copyright free / creative commons unless otherwise stated.
You are welcome to use under a Creative Commons Attribution-nonCommercial-ShareAlike License.
All Text copyright Lakelands Academy & Mr T Purslow 2020.  All images copyright free / creative commons unless otherwise stated. You are welcome to use under a Creative Commons Attribution-nonCommercial-ShareAlike License.
All Text copyright Lakelands Academy & Mr T Purslow 2020.  All images copyright free / creative commons unless otherwise stated. You are welcome to use under a Creative Commons Attribution-nonCommercial-ShareAlike License.
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